SBIR-STTR Award

Silicon carbide electronics technology has several advantages over conventional silicon electronics and it finds its application in several power electronics applications. However, the manufacturing of reliable SiC power devices is a critical challenge because of the degradation of the forward current gain or voltage drop attributed to the propagation of Shockley-type stacking faults (SF) which are nucleated by basal plane dislocations (BPDs) present in the epitaxial layers. The current state-of-the-art SiC epitaxial methods are less successful in eliminating such defects, hindering the commercialization of this technology. Sinmat, in collaboration with University of South Carolina, plans to investigate a novel defect capping and planarization assisted growth (DC-PAG) process that is expected to reduce the defect density (inclusive of BPD and other defects) by at least two orders of magnitude, thereby resulting in virtually BPD-free wafers. This novel method uses a novel polishing process to impede the propagation of defects during growth. Such a technical enhancement will lead to high performance, reliable and reproducible SiC based power devices and can lead to rapid insertion of SiC devices in military, automotive and renewable energy sectors.

Benefit:
TThe DC-PAG technology will enable the SiC applications in high power and alternative energy applications. Silicon carbide (SiC) power devices can be used in applications such as solar inverters, power convertors for computing and network power supplies; industrial motors and hybrid electric vehicles. The SiC power device can also be used in high-power, high frequency, high temperature military and aerospace applications.

Keywords:
Silicon Carbide, Epi Layer, Basal Plane Dislocations, Bipolar Devices, Cvd Growth, Chemical Mechanical Polishing

Silicon carbide based power devices has several advantages because it can be used in very high power, high temperature, high frequency applications, where conventional silicon devices cannot be used. Despite significant advancement in SiC semiconductor technology in the past 3 decades, the presence of device killing defects in the epilayer has impeded the rapid commercialization of SiC-based power devices such as MOSFETs, bipolar-mode diodes and thyristors. Current state of the art methods to reduce these defects have made incremental progress and primarily rely on improvements in conventional growth techniques. A new substrate defect engineering technology has been proposed and demonstrated to reduce defects in SiC epilayers. The reduced defect density epilayers based on the defect engineered substrate will increase the performance SiC devices, device yield and hence can reduce the cost of manufacturing.

Benefit:
The high performance, low cost SiC devices will enable its applications in high power, high frequency and alternative energy applications. Silicon carbide (SiC) power devices can be used in applications such as solar inverters, power conversion in computing and network power supplies, variable-speed drives for industrial motors and hybrid electric vehicles, and products used in high-power, harsh-environment military and aerospace environments.

Keywords:
Silicon Carbide, High Power Devices, Basal Plane Dislocations, Bipolar Junction Transistors, Defect Capping, Chemical Mechanical Polishing, Epigrowth, Device Fabrication