Alternative System Concepts Inc. (ASC) performs funded basic research and advanced product development for electronic design automation. ASC creates and licenses innovative EDA tools for high-level design flows. SBIR funding has provided major support for the development of breakthrough methodologies that equip customers with innovative design tools, giving them a distinct competitive advantage for meeting tomorrow's challenging requirements for interoperability, testability, soft error recovery and lowest power. EDA tool licenses: HDL Translation - ASC's popular VHDL2verilog and verilog2vhdl Translators are now licensed and supported by SynaptiCAD (go to http://www.synapticad.com); VBIT® - IEEE Std 1149 JTAG RTL Insertion - Preliminary support for IEEE Std 1500 CTAG is also available; CoolChip - High-level power optimizing design flow using PACIFIC and macro block library elements such as ALF or popular design libraries; PACIFIC - ESL Power Optimizer automatically explores the design space for best architecture that meets timing constraint for dramatic reduction in switching and leakage power. Removes the guesswork from low power analysis and design; CORAL - Characterizes RTL macromodels for power for use in ESL flows. Examples of macro-block library components are adder, multiplier, mux, etc. CORAL supports IEEE Std. 1603 ALF and popular industry library formats; OpenALF is the open source ALF Compiler written in Perl. Technology module licenses: Save valuable project time by embedding proven software. Cross license one our reusable modules (C++, XML, and/or Python): * FRITS VHDL or Verilog parse tree * IEEE Std 1603 ALF Compiler and API * Behavioral fault modeling * Hardware/software co-design * Radiation hardening by design (also for soft errors) * VTMR soft error correction
