SBIR-STTR Award

In this STTR proposal, we propose to develop a cost-effective and high-fidelity nanoimprint process for the fabrication of integrated photonics devices. VLSI photonics applications require a hig-level of control on device-to-device uniformity. Nanoimprint lithography (NIL) holds promise to overcome the current technological challenges in lithography while being cost effective at the same time. One of the key features of NIL is its ability to preserve and directly translate the lithography patterns from the mold, which should enable highly improved device-to-device uniformity within a die and between die-to-die on a wafer. In this proposal, we will demonstrate the feasibility of using NIL for photonics applications, especially for VLSI integrated photonics structures.We will develop a robust fabrication process that uses NIL to fabricate photonics structures. We will also demonstrate the feasibility of CMOS compatible and passive post fabrication tuning process based on NIL to tune the optical properties of the photonic structures. It will be shown in the course of this proposal that devices fabricated using NIL suffer from lower chip-to-chip variations than those fabricated using e-beam lithography while maintaining the same quality. This effort will also prove a first step for extending the application of NIL in opto-electronics and IC fabrication.

Keywords:
Low Cost High Resolution Lithography, Nanoimprint, Thermal Nanoimprint, Integrated Optics, Low-Cost High Precision Photonics, Pattern Insensitive Nanoimprint.

There are major technical and financial barriers that are preventing Si photonics and optoelectronics to transition from R&D to commercial product domain. The main technical challenge is the nanometric scale precision required for proper functioning of Si photonic devices. High index contrast of Si with its cladding materials allows reducing the size of photonic elements and hence allows packing more and more functionalities in smaller area. However, the same high index contrast results in very high sensitivity of these resonators to nanometer scale variations. Similarly, on the financial side, the cost of fabricating these devices has to be reduced before Si photonics can go into commercial production. Sinoora Inc. plans to overcome these major challenges in this STTR Phase II project by developing a robust and low-cost manufacturing process that can deliver very precise Si photonic and optoelectronic circuits.

Keywords:
Nanoimprint, Lithography, Si Photonic And Optoelectronic, Post-Fabrication Trimming