SBIR-STTR Award

Field Programmable Gate Array (FPGA) Physical Unclonable Functions
Award last edited on: 2/1/2013

Sponsored Program
SBIR
Awarding Agency
DOD : OSD
Total Award Amount
$823,978
Award Phase
2
Solicitation Topic Code
OSD10-A02
Principal Investigator
James M Lewis

Company Information

Lewis Innovative Technologies Inc (AKA: LIT~LITI)

534 Lawrence Street
Moulton, AL 35650
   (256) 905-0775
   info@lewisinnovative.com
   www.lewisinnovative.com
Location: Multiple
Congr. District: 04
County: Lawrence

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2011
Phase I Amount
$100,000
LIT proposes development of PUF Technology with improved entropy, variation, and noise characteristics. This technology holds promise for verifying the configuration of secure systems and verifying that the configuration has not been tampered with. This concept provides a new capability for verifying and authenticating hardware. In order to be effective for all AT applications, PUF responses must exhibit a unique result for each unit tested, exhibit a consistent result each time the same unit is tested, and provide as many effective bits of accuracy as possible.

Keywords:
Lit’s Puf Design Does Not Require Critical Component Placement And Routing Outside Of The Chip Operation And Is Capable Of Verifying And Monitoring An Entire System. Also, Han

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2012
Phase II Amount
$723,978
LIT accomplished all Phase I goals and technical objectives. In Phase I LIT produced an effective Random Number Generator (RNG) and tested two PUF designs. The PUF designs showed greatly improved Entropy and Stability over other technologies. LIT’s Entropy Goal for Phase II is 100% (already proven by analysis) and the Stability goal is one bit error per million bits. In Phase II LIT will mature this PUF technology by producing 3 programmable logic IP Blocks: Asymmetric PUF (APUF), Memory Authentication Parameter Sensor (LIT’s memory incorporating PUF), and a Random Number Generator. LIT partner Lockheed Martin Mission Systems and Signals will test the IP Blocks (Cores) in tactical hardware to achieve TRL 8. LIT will produce interface software to use with the PUF cores allowing a customer to access, test, evaluate, and characterize the PUF performance in their application. LIT is producing a PUF test suite to accumulate and process test results in order to quantify Variation, Entropy, and Stability metrics. At the end of Phase II LIT will provide two licenses for each PUF core and provide 2 day training on the use of the IP Blocks and related tools.

Keywords:
Physical Unclonable Function (Puf), Asymmetric Puf, Memory Incorporating Puf, Random Number Generator, Varaition, Entropy, Stability, Noise