SBIR-STTR Award

System Self-Protection and Autonomic Response for Hardware Based Software Protection
Award last edited on: 7/8/2010

Sponsored Program
SBIR
Awarding Agency
DOD : OSD
Total Award Amount
$1,378,626
Award Phase
2
Solicitation Topic Code
OSD07-I04
Principal Investigator
Godfrey Vassallo

Company Information

AFCO Systems Development Inc (AKA: Sicore Technologies Inc)

200 Finn Court
Farmingdale, NY 11735
   (631) 249-9441
   info@afcosystems.com
   www.afcosystems.com
Location: Multiple
Congr. District: 02
County: Nassau

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2008
Phase I Amount
$99,621
AFCO Systems Development’s (ASD’s) solution will protect a host system by using various autonomic techniques. These techniques will resist, detect, respond, and where possible, repair the damage caused by an adversary. Current technology does not provide the type of protection that is necessary against an attacker with virtually infinite personnel and resources. Protection needs to be assured not only if an attacker tries to compromise the system remotely, but also if the attacker has possession of the actual hardware. A physical penetration attack, where the attacker probes the circuit will be thwarted by having a grid of non-metallic conductors that will detect probing. Attacks using radiation or changing temperature will be detected through the use of radiation and temperature sensors. All of the anti-tampering responses will be hardware based because software is too slow. The team is qualified to accomplish this task because of its experience in working with secure coprocessors and embedded systems.

Keywords:
Tamper Resistance, Tamper Detection, Autonomic Response, Self Protection

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2009
Phase II Amount
$1,279,005
SHIELD is a defense-in-depth multi-layered architecture that is suitable for a GIG end-node based upon COTS technology. The architecture contains the following layers: 1. A set of application software and data protection techniques, which utilize an out-of-band secure coprocessor and its reconfigurable hardware. 2. An in-band kernel module that detects host subversion and cooperates with secure coprocessor to protect critical data and software. 3. An autonomous secure coprocessor that has autonomic self healing and protection capabilities. The coprocessor also protects system secrets and provides a shielded environment for the execution of code. 4. A hardened system enclosure to enhance the architecture’s ability to resist, detect and to respond to a physical as well as a logical attack. The proposed end-node architecture facilitates the coordination of activities between the protected application, the in-band kernel module, and the secure coprocessor. When the protected application is invoked the in-band kernel module is notified. The module then requests the coprocessor to validate and prepare the application for execution on the host. Edge nodes will be fortified with a hardened system enclosure that has the ability to detect, resist, report and respond to a physical attack.

Keywords:
Secure Coprocessor, Gig Endnode, Cyber Security, Reconfigurable Computing