SBIR-STTR Award

High-Voltage-Discharge Self-Destruct Mechanisms
Award last edited on: 7/8/2010

Sponsored Program
SBIR
Awarding Agency
DOD : OSD
Total Award Amount
$849,791
Award Phase
2
Solicitation Topic Code
OSD05-A12
Principal Investigator
Andrew Mostovych

Company Information

Enterprise Sciences Inc

14817 Silverstone Drive
Silver Spring, MD 20905
   (301) 388-3838
   info@enterprisesciences.com
   www.enterprisesciences.com
Location: Multiple
Congr. District: 08
County: Montgomery

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2006
Phase I Amount
$99,791
This proposal presents a plan for developing and evaluating new high-voltage technologies capable of permanently destroying the functionality of semiconductor memory and processor circuits as well as any residual data remanence stored in these units. The envisioned technologies can be implemented on the chip, pc-board, or device platform level--equally effectively for new designs as well as retrofits of older equipment. This will allow for the quick physical self-destruction of critical components in secure systems should the systems be physically compromised. The proposed effort will evaluate, design, and demonstrate the technology in laboratory trials. The program in this proposal has the goals of laboratory implementation and verification of miniature "Marx-bank" pulsers that can be integrated into standard pc-board designs, as well as demonstration of on-command destruction of memory and processor semiconductors by high voltage discharge from these pulsers.

Keywords:
HIGH VOLTAGE DISCHARGE, MICROCIRCUIT DESTRUCTION

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2008
Phase II Amount
$750,000
This proposal presents a plan for developing and perfecting new high-voltage technology capable of permanently destroying the functionality, the residual data remanence, and internal structure of semiconductor memory, semiconductor processors, and many other micro-devices that may contain secured information that must be protected from unauthorized tampering. The envisioned technology can be implemented on the semiconductor die, IC chip, pc-board, or device platform level equally effectively with components specifically customized for this technology or retrofitted at a later stage in their incorporation into secure systems. The proposed effort will: conduct basic R&D to perfect and optimize the technology; pursue advanced fabrication development to increase the capabilities of the technology and make the technology amenable to large scale production; and produce advanced prototypes to test and demonstrate the technology in real anti-tamper system applications.

Keywords:
High-Voltage, Self-Destruction, Anti-Tamper