SBIR-STTR Award

Fast, Flexible, Adaptive Channel Coding with Near-Shannon-Limit Performance
Award last edited on: 11/3/2006

Sponsored Program
SBIR
Awarding Agency
DOD : OSD
Total Award Amount
$2,331,465
Award Phase
2
Solicitation Topic Code
OSD03-025
Principal Investigator
Fan Mo

Company Information

Efficient Channel Coding Inc (AKA: ECC Inc)

600 Safeguard Plaza Suite 100
Brooklyn Heights, OH 44131
   (216) 635-1610
   info@eccincorp.com
   www.eccincorp.com
Location: Single
Congr. District: 07
County: Cuyahoga

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2004
Phase I Amount
$99,603
For Phase I, ECC proposes to design a new type of LDPC codes optimized for the unique requirements of adaptive systems. The new set of adaptive codes will be designed with a common, parent-type of code that will comprise the core of our unique, highly efficient and low complexity encoder and decoder. The design will make it possible for fast on-the-fly switching while providing a set of codes that offers the performance characteristics required for varying practical channel conditions. We will also research the code designs and select codes required to accommodate other advanced techniques used in advanced communication systems, such as high order modulation, Space Time Coding (STC) and Code Division Multiple Access (CDMA).

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2005
Phase II Amount
$2,231,862
The Flexible Adaptive Shannon Transmission for Wideband Networking Waveform (FAST-WNW) system provides near Shannon limit modulation & coding waveforms that automatically adapt to the link conditions while maintaining compatibility with JTRS-WNW channelizations. These techniques can provide up to a factor of 24 increase in data throughput with 5 to 10 dB less of power as compared to JTRS-WNW. This provides a significant increase in network flexibility as compared to the Joint Tactical Radio System (JTRS) WNW Orthogonal Frequency Division Multiplexing (OFDM) and Anti-Jam (AJ) techniques. In this Phase II SBIR, Efficient Channel Coding (ECC), Xenotran, and 0dB Coding will demonstrate the flexible, near-Shannon limit Forward Error Correction (FEC) techniques developed by each company in separate Phase I efforts. This will be achieved through a demonstration implementation in Field Programmable Gate Array (FPGA) technology. Additionally, the top-level design for the overall FAST-WNW system will be developed. A Phase II Option is proposed that would further the demonstration by integrating the FEC into an adaptive modem system, allowing the demonstration of the FAST-WNW concept in a system environment.

Keywords:
JTRS, WIDEBAND NETWORKING WAVEFORM, LOW DENSITY PARITY CHECK CODES, TAIL-BITING CIRCULAR-TRELLIS BLOCK CODING, DOUBLE-BINARY TAIL-BITING PARALLEL CONC