SBIR-STTR Award

An expert system for the control of lithography overlay in advanced semiconductor manufacturing
Award last edited on: 3/31/2003

Sponsored Program
SBIR
Awarding Agency
NSF
Total Award Amount
$50,000
Award Phase
1
Solicitation Topic Code
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Principal Investigator
Terrence E Zavecz

Company Information

TEA Systems Corporation

879 Schlossburg Street
Alburtis, PA 18011
   (610) 682-4146
   tzavecz@enter.net
   N/A
Location: Single
Congr. District: 07
County: Lehigh

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
1992
Phase I Amount
$50,000
The resolution and total overlay accuracy needed for Advanced Semiconductor Manufacturing has increased by approximately 30 percent every two and a half years. Current design rules lie near or below the actual wavelength of visible light. Therefore, optical tools for pattern generation are now being supplemented by new technologies such as x-ray and Electron Beam exposure systems. Manufacturing of sub-half micron design rule devices presents the engineer with the need to control pattern overlay with an accuracy greater than ever before. His task is complicated by the need to calibrate, match, and maintain a mix of new lithography tools, which may be of very different technologies. The most successful technique has been to model the distortions of printed patterns a ainst the parameters of the lens and alignment systems. However, new methods are needed. Researchers are testing the feasibility of an expert system for enhanced process overlay control. This system, called LIMET-expert, uses newly developed techniques to provide the mbdeling and statistical experience needed to customize models and algorithms. LIMET-expert has applications in the real-time control and maintenance of the process as well as the pattern generation equipment.The potential commercial application as described by the awardee: This project provides. improved pattern overlay control through the analysis of image distortions. The Expert System serves to improve IC yields and provides new methods of Statistical Process Control for the next generations of Semiconductor Design.

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
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Phase II Amount
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