SBIR-STTR Award

The objective of this project is to initiate the development of a new and very powerful family of error correcting codes (i.e., algebraic geometry codes from Hermitian curves), by laying the groundwork for the implementation of one of the shorter codes from this family. Applications in which, for a variety of reasons, symbol size is constrained to four bits, are being addressed. Algebraic geometry codes with this symbol size are superior to other four bit codes, yet the decoding procedure is amenable to near-term execution. Development of a near-term product for early commercialization benefits the longer term goal of more broadly exploiting this powerful family of codes. The research is bringing together recent contributions from various sources to define a decoding algorithm and apply it to a specific four bit code. The decoder structure is being defined in sufficient detail to allow pre-design of the decoder hardware. A computer simulation of the decoding algorithm is also being developed to study Hermitian code performance over a broad range of parameter values, address tradeoff issues, and to demonstrate the performance of the code selected for hardware implementation.The potential commercial application as described by the awardee: This project will initiate the implementation of an improved class of codes based on algebraic geometry. Near-term applications include error correction in solid state memory and with QAM signal transmission. Dramatic improvements in satellite communications and image data storage could be expected from later advancements.

This project is funded under the National Science Foundation's (NSF) Small Business Innovation Research (SBIR) program, which is designed to provide an opportunity for small business, particularly the small high technology firm, to participate in NSF research. Phase I of the SBIR program serves as a filter to select promising proposals and determine if the firm can do high quality research. Phase II is the principal research project. Phase III is the conversion of the NSF-funded research into commercial applications and technological innovation supported by follow-on private venture capital or other non-federal financing. The objective of this Phase II program is to continue the development of a decoder for Hermitian codes, begun in Phase I, by completing additional refinements to the mathematics of the decoding algorithm and to the C-language decoder simulation, and by designing the architecture and detailed logic of a demonstration VSLI codec implementation for a specific four bit code.