As silicon technology moves to deep nano-meter process, the trend for FPGA companies is to concentrate on commercial products and moves away from developing large FPGA chips specifically for radiation hardened (RH) applications requiring high radiation dosage. The volume of rad-hard chip market is small relative to the commercial sector. Newer FPGA chips are only offered as radiation tolerant (not Rad-Hard) and will not meet the Navy topic requirements for dosage, latch-up threshold, or circumvention and recovery time. As the trend continue, its unlikely large RH, high total ionization dose FPGA device will exist in the near future. The problem further exacerbated as deep-nano meter silicon fabs currently do not offer RH silicon process - mainly due to economic reason. In addition, rad-tolerant FPGA chips are very expensive. Our proposal will provide fully RH FPGA chips at 1/3 the cost. Dosage and latch up threshold met the requirements even for deep space applications, and support C&R time of orders of magnitude better. For this SBIR project, in Phase 1 Base (6 month), we will design and verify the MxN array, fully radiation hardened FPGA core. In Phase 1 option period (6 month), we will define and design an SoC FPGA chip based on the new RH-FPGA-Core and target it for GF 12LP silicon process. This proposal will meet or exceed the Navy requirements.
Benefit: - Fully radiation hardened FPGA chip with dosage >300Krads - capable of supporting deep space deployment - Latch-up threshold >100 MeV-cm2/mg - circumvention and recovery time in micro-second range - orders of magnitude better than commercial products or Topic requirement - scrub out errors - enabling continuous operations if encountered error - Use deep nano-meter process GF 12LP that are utilized by the DoD - Design and manufacture in secure US fab - enable independent verification and validation activity by United States Government for security and certification - The result is fully rad-hard - not partial, not just rad-tolerant - End product pricing at 1/3 cost of available rad-tolerant solution - Method suitable for any silicon process, not dependent on availability of rad-hard library - saving cost, time - Full suite of proven tools available for FPGA programming, rad-hard implementation, with ability to generate artifacts for certification
Keywords: error correction, error correction, tri-modular redundancy, rad hard validation, circumvention recovery, rad tolerant FPGA, radiation hardened FPGA, error scrubbing, RH FPGA core
