When choosing hardware for implementing neural networks, one must consider what are the most important performance constraints for the operator in the field. We propose to implement low-latency, high-bandwidth neural networks employing hardware such as FPGAs and novel neuromorphic photonic chips. It is often assumed that pattern classification networks are best when they can classify a large number of inputs per second, while spending the least amount of energy per input. But the warfighter in the field needs to make decisions within a very short response time window, especially when tracking hostile objects in physical space or responding to attacks in cyberspace. Unless the enhanced processing power of neuromorphic processors can be harnessed to produce low-latency results, they cannot be used in certain classes of real-time decision-making applications. Most traditional AI accelerator hardware, such as GPUs, are focused on having high throughput and although they have kilowatt-high power consumption, it is diluted by the massive amount of data flowing through them. This satisfies the computing needs for training large neural networks, which can be done upfront in data centers with optimal cooling and access to bulk electricity. But the same hardware is not as power-efficient when deployed in mobile computers for running pre-trained neural networks with lower data volume. This motivated development of efficient neuromorphic processors, e.g. IBMs TrueNorth and Intels Loihi, but they are limited to low-bandwidth signals (100 Hz) designed for human-machine interactions. We propose to investigate hardware implementations of neuromorphic algorithms that run at sub-microsecond latencies, with signals that approach GHz speed. This would enhance command of the radio spectrum, which requires real-time processing of many radiofrequency (RF) signals, e.g. for suppressing jamming and interference in adversarial environments. It would also enable control or tracking of supersonic missiles and aircraft, which require sub-millisecond-scale feedback loops.
Benefit: The commercialization of this technology has recently become viable and advancements in standardized photonic foundries, both in the US and abroad, have proven the feasibility of mass photonic fabrication and packaging. The proposed hybrid system requires an FPGA, a photonic integrated circuit, control hardware, and packaging which interfaces the electronics and photonics for commercialization. A COTS FPGA will be sufficient for the system which can easily be purchased in bulk. The custom photonic integrated circuit can be fabricated in large quantities at AIM Photonic Foundry in the US or abroad in foundries such as Advanced Micro Foundry (AMF). Bascom Hunter and Princeton University has worked in collaboration for the past few years to design and fabricate photonic specific control hardware, which can be tailored to this system and fabricated at any US based PCB manufacturer. Lastly, the packaging interface between the photonics and electronic is the least mature step of the commercialization process. Bascom Hunter has invested in developing this in house over the past few years with assistance from Linear Photonics (see Figure 4). While achievable in house for prototyping, outsourcing packaging at scale is preferable. AIM Photonic Foundry offers these services and could be utilized to scale for commercialization. Bascom Hunter foresees no obstacles in the commercialization of this technology in later phases of the research.
Keywords: optical processing neuromorphic neural networks, optical processing neuromorphic neural networks
