SBIR-STTR Award

Quantum Emulation Co-processor Circuit Card
Award last edited on: 12/20/2021

Sponsored Program
STTR
Awarding Agency
DOD : Navy
Total Award Amount
$239,956
Award Phase
1
Solicitation Topic Code
N20A-T016
Principal Investigator
Jeremy Juybari

Company Information

Faster Logic LLC

4885 Atlanta Drive
San Diego, CA 92115
   (619) 786-0195
   N/A
   N/A

Research Institution

San Diego State University

Phase I

Contract Number: N68335-20-C-0355
Start Date: 6/8/2020    Completed: 11/11/2021
Phase I year
2020
Phase I Amount
$239,956
Whereas quantum computers stand to drastically transform computation for a number of existing and future problems, its realization in the near term produces certain challenges. Simulation and Emulation techniques make it possible to consider the advantages of quantum computation in real-world applications in cryptography, machine learning, signal processing, and cybersecurity. They also open the doors to learning. Just as we've seen classical systems used to teach quantum information concepts, we can -- and have -- reproduced coherent quantum states in classical analog electronics. This was a crucial step in our SDSU laboratory work, getting ready to build actual low temperature devices. Our advancement under STTR funding will be to interface these classical electronic circuits with digital logic, and in this case of the Navy proposal, to create a coprocessor architecture that works together with the more ubiquitous digital computer. Ours is a hybrid architecture, purposed to gain the advantages of historical

Benefit:
We cite research that has praised quantum emulation as a valuable computing solution. Our development leading to an emulated quantum computer will permit timely low-cost testing of quantum computing algorithms, verified at speeds far faster than a simulation can be achieved. Whereas truly quantum mechanical states are highly sensitive to environmental noise and quickly decohere, our classical system with macroscopic state voltages (or more specifically oscillations with magnitude, frequency, and phase) is far more robust. We can measure states over comfortable time scales without a resulting alteration of the system, thus avoiding the no cloning theorem, well-known in quantum information theory. As pointed out by Kish (2003), these features may allow emulated quantum computing to offer new benefits and potential architectures which are not possible in true quantum computation. Increasing the number of innovations made by electrical engineers to these physics-dominated problems is a benefit which should not be underestimated. Our engineering approach to quantum systems has so far served us well. Understanding the evolution of quantum probabilities by way of analogs to equivalent electrical circuits is incredibly useful. The vast majority of electrical engineers have not been introduced to the standard formalism required for understanding quantum gates. Emphasizing equivalent circuit analogs in addition to Hamiltonian formalism has a great potential to bring the creative know-how of electrical engineers to bear on some of these topics. Therefore another benefit of this work is a broader educational component, creating more opportunities for cross-discipline collaboration and innovation.

Keywords:
Coprocessor, Coprocessor, PCI, Quantum Computing, Analog Computing, Field Programmable Gate Array, Quantum Emulator, USB

Phase II

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
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Phase II Amount
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