SBIR-STTR Award

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Micromachined GaAs wafer comparisons for the VHSIC S-band and L-band FET
Award last edited on: 12/18/2014

Sponsored Program
SBIR
Awarding Agency
DOD : Navy
Total Award Amount
$46,630
Award Phase
1
Solicitation Topic Code
N86-142
Principal Investigator
J W Pearson

Company Information

Lehrer Pearson Inc

1175 Kottinger Drive
Pleasanton, CA 94566
   (408) 335-2236
   N/A
   N/A
Location: Single
Congr. District: 15
County: Alameda

Phase I

Contract Number: 14897
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1986
Phase I Amount
$46,630
VHSIC integrated circuitry can be made with better repeatability better yield and lower cost using GaAs wafers with better flatness, parallelism and reduced crystal damage. Micromachining is a promising wafer fabrication process to achieve the desired VHSIC integrated circuitry improvements.

Phase II

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
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Phase II Amount
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