SBIR-STTR Award

Small self contained aircraft fatigue data recorder
Award last edited on: 9/4/2002

Sponsored Program
SBIR
Awarding Agency
DOD : Navy
Total Award Amount
$548,959
Award Phase
2
Solicitation Topic Code
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Principal Investigator
Philip D Flanner

Company Information

Esprit Technology Inc

PO Box 18
East Aurora , NY 14052
   N/A
   N/A
   N/A
Location: Single
Congr. District: 27
County: Erie

Phase I

Contract Number: N85-127
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1985
Phase I Amount
$49,884
Because of extended use of older airframes, increased mission requirements such as more severe catapults and arrestments, and adoption of more brittle alloys, monitoring of fatigue damage accumulation at particular locations on military aircraft has become important. While no small, self-contained data recorders for use in military environments are presently available, advances in low-power CMOS circuitry, battery technology, and high-density packaging indicate that mechanization of such a unit is achievable. The phase i feasibility study will investigate means for integrating the latest microprocessor and digital memory technology with optional algorithms, and various sensors (acceleration, strain, pressure and temperature). The project will culminate in a conceptual hardware design layout and performance analysis of a recording instrument having target specifications of: 8 cubic inches volume, 30 days self-power, use with internal or external transducers, multi-channel operation, 50hz bandwidth, and user control of range, data exclusions, bandwidth and storage format.

Phase II

Contract Number: NAVY85-127
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
1986
Phase II Amount
$499,075
Because of extended use of older airframes, increased mission requirements such as more severe catapults and arrestments, and adoption of more brittle alloys, monitoring of fatigue damage accumulation at particular locations on military aircraft has become important. While no small, self-contained data recorders for use in military environments are presently available, advances in low-power CMOS circuitry, battery technology, and high-density packaging indicate that mechanization of such a unit is achievable. The phase I feasibility study will investigate means for integrating the latest microprocessor and digital memory technology with optional algorithms, and various sensors (acceleration, strain, pressure and temperature). The project will culminate in a conceptual hardware design layout and performance analysis of a recording instrument having target specifications of: 8 cubic inches volume, 30 days self-power, use with internal or external transducers, multi-channel operation, 50Hz band-width, and user control of range, data exclusions, bandwidth and storage format.