SBIR-STTR Award

Very High Speed Fiber Optic Data Bus
Award last edited on: 11/27/2002

Sponsored Program
SBIR
Awarding Agency
DOD : Navy
Total Award Amount
$217,092
Award Phase
2
Solicitation Topic Code
N83-093
Principal Investigator
Phil Couch

Company Information

Fibercom Inc

3353 Orange Avenue Northeast
Roanoke, VA 24012
   (703) 342-6700
   N/A
   N/A
Location: Single
Congr. District: 06
County: Roanoke city

Phase I

Contract Number: 01226
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1983
Phase I Amount
$47,245
Fiber optic technology which has been developing over the past few years, offers significant advantages compared to wire data links: lower loss, greater bandwidths, tolerance of adverse environments, and installation flexibility. The increasing data transmission rates and distributed processing architectures of navy systems require high speed data buses. Some military fiber optic data bus development has been conducted, however, much component technology and commerical local area network technology has not been applied to improve the cost effectivness of navy systems. The proposed project will analyze navy platform and shore-based requirements for a high speed data bus and define the optimum bus configuration to meet those requirements.

Phase II

Contract Number: 01226
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
1985
Phase II Amount
$169,847
Very high speed data transfer networks will be required in the late 1990's to complement the development of distributed processors incorporating vhsic and gaas technologies. Fiber optic data bus technology can provide the wide band width communication media required with the additional benefits of invulnerability to emi/emp while being physically small, light, and strong. The proposed phase ii sbir is to design, breadboard, and demonstrate a very high speed, 500 mb/s, fiber optic data bus interface module, bim, with gaas encoding and decoding. In addition, a bus architecture will be developed for inserting the technology onto a platform to serve as a "master" bus for inter-systems or intra-platform data transfer. This bus would access systems through gateways ro other buses, through standard ntds (10 mb/s) interfaces, or directly to terminals such as sensors with 10-100 mb/s data rates.