SBIR-STTR Award

Silicon based imaging devices are sensitive over a wide range of operating wavelengths and are readily integrated with the associated readout electronics. However, the physics of the metal-oxide-semiconductor devices used limits their circuit performance at cryogenic temperatures. Superior performance at low temperatures might be achieved using gallium arsenide or superconductor based circuits but would require the development of hybrid technologies. Our proposed innovation is the development of a strained silicon/silicon-germanium quantum well field effect transistor technology for high speed, low noise cryogenic electronics. This material system combines the advantages of high carrier mobility, normally associated with III-V compound semiconductors, with the many advantages of silicon processing compatibility. In addition, strained quantum well field effect transistors will have higher radiation tolerance than conventional complementary metal-oxide-semiconductor devices. High performance cryogenic circuits based on these devices will satisfy many of the needs outlined in sub-topic 22.01 of this NASA program. They will also add enhanced analog and digital signal processing functionality to focal plane array detectors. If realized, this innovation will lead to a new generation of low noise, low power and fully integrated imaging systems using silicon and/or germanium based detectors.

Potential Commercial Applications:
The primary application for this technology is cryogenic low noise, radiation hard readout electronics for focal plane detector arrays. Similar opportunities exist in high speed-radiation hard electronics for satellite applications. Likewise, there is a growing demand for low noise cryogenic circuits for medical applications such as sensors for measuring biomagnetic fields as well as positron emission tomography and nuclear magnetic resonance imaging. The strained silicon layers on silicon-germanium will be applicable to the fabrication of high speed room temperature metal oxide semiconductor devices which are being explored for commercialization. In addition, the low defect density silicon germanium alloy layers to be developed here can be lattice matched to III-V materials; the resulting virtual substrates could enable other hybrid technologies.