This proposal is to develop a multi-Mega-pixel camera-on-a-chip usingstandard 0.3-micron complementary-metal-oxide-semiconductor (CMOS) technology to process the chip on an 8-inch wafer. The camera-on-a-chip is a multi-Mega-pixel active-pixel array containing substantially more on-chip processing electronics then the current charge-coupled-device (CCD) arrays, aimed at high-resolution imaging applications. The proposed camera-on-a-chip contains the following on-chip signal processing electronics using standard CMOS cells for implementation: a 2,000 x 1,300 array of photogates for imaging, a floating diffusion for temporary storage of photo-charges, an antiblooming circuit for reducing cross-talk at high illumination, vertical and horizontal decoders with clock generators for random-access readout, a correlated-double-sampler circuit for noise reduction, an input circuit for integration time control and an A/D converter for on-chip digitization. Phase 1 will identify current limitations and capabilities of on-chip circuits in current CMOS arrays and design a camera-on-a-chip with more signal processing circuits, including an A/D converter. Phase 2 will fabricate and test the multi-Mega-pixel camera-on-a-chip. Phase 3 will productize the camera as a sellable product to commercial customers.
Potential Commercial Applications:Multi-Mega-pixel CMOS Camera for: Scientific imaging, medical imaging, professional photography and high definition TV.
