This project addresses charge-domain image compression on a monolithic charge-coupled device (CCD) detector. Such a device would have substantially reduced output bandwidth compared to existing pixel-by-pixel readout systems. Since current image compression algorithms can provide compression factors of greater than 10:1 with little visible degradation, a charge domain compressor CCD could reduce system electronics mass and power requirements by an order of magnitude without compromising image quality. The objectives of this project are to devise an image compression algorithm that can be implemented in the charge domain and to produce an electrical design for a CCD that implements that compression algorithm and a block design for the system that incorporates it. The effort will develop a software simulation of a charge domain compressor, use the simulation to optimize the compressor performance, determine the optimal partitioning between on-chip and off-chip, and estimate the power required for such a system. Potential NASA uses for a charge-domain image compressor CCD include minimizing electronics resource requirements for very high resolution (e.g. landing site selection) and very small (e.g. rover and penetrator) planetary mission cameras.Potential commercial applications for CCD charge-domain image compressors/detectors include spaceflight imaging systems, electronic (i.e. non-film based) motion picture systems, and consumer video cameras.focal plane, image compressions, charge-domainSTATUS: Phase I Only
