SBIR-STTR Award

The objective of this research is the development of a low power digital controller (LPDC) for providing the overall control electronics functions for a highly accurate and stable laser pointing and tracking system to be applied to laser intersatellite communication systems. Reductions in system power, size and weight are to be achieved without sacrifice of performance by application of the latest technology in CMOS VLSI, computer architecture, and advanced control system theory. The computational load for a control system processor to meet laser pointing and tracking requirements is considerable, and without severe design compromises, cannot be handled in conventional microprocessors. With the LPDC processor it can. However, more than the design of a low power small processor is involved. The same technology will be applied to reduce size, weight and power of the interface electronics, as well. IN addition, advanced system techniques will be applied to cut power used in motors and sensors. Anticipated Phase I results are the conceptual design of such a system and a feasibility assessment including costs. Phase II efforts will lead to a complete control system designed for space applications.

___(NOTE: Note: no official Abstract exists of this Phase II projects. Abstract is modified by idi from relevant Phase I data. The specific Phase II work statement and objectives may differ)___ The objective of this research is the development of a low power digital controller (LPDC) for providing the overall control electronics functions for a highly accurate and stable laser pointing and tracking system to be applied to laser intersatellite communication systems. Reductions in system power, size and weight are to be achieved without sacrifice of performance by application of the latest technology in CMOS VLSI, computer architecture, and advanced control system theory. The computational load for a control system processor to meet laser pointing and tracking requirements is considerable, and without severe design compromises, cannot be handled in conventional microprocessors. With the LPDC processor it can. However, more than the design of a low power small processor is involved. The same technology will be applied to reduce size, weight and power of the interface electronics, as well. IN addition, advanced system techniques will be applied to cut power used in motors and sensors. Anticipated Phase I results are the conceptual design of such a system and a feasibility assessment including costs. Phase II efforts will lead to a complete control system designed for space applications.