SBIR-STTR Award

A floating-point computer module for array processing on a FLEX/32 multicomputer
Award last edited on: 12/19/14

Sponsored Program
SBIR
Awarding Agency
NASA : LaRC
Total Award Amount
$550,000
Award Phase
2
Solicitation Topic Code
-----

Principal Investigator
Nicholas Matelan

Company Information

Flexible Computer Corporation

1801 Royal Lane Unit 810
Dallas, TX 75229
   (214) 869-1234
   N/A
   N/A
Location: Single
Congr. District: 24
County: Dallas

Phase I

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1984
Phase I Amount
$50,000
The FLEX/32 MultiComputing Environment is a general-purpose, digital multiprocessor system that allows virtually any number of high performance, heterogeneous, 32-bit Computer Modules to compute together on one or more tasks. This project addresses the feasibility of adding a new Computer Module to the FLEX/32 standard set: the Pipelined Floating Point Computer Module (FPCM). This module would operate in the four to six megaflops (million floating point operations per second) range. It would be fully integrable into any FLEX/32 configuration, be it all FPCMs or mixed as needed with already existing Computer Module types. FPCM software would execute under UNIX System V, used by other FLEX/32 modules. A FLEX/32 cabinet could contain up to twenty FPCM processors, giving single cabinet power in the 80 to 120 megaflops range. Since there is no inherent architectural limitation to the number of cabinets that can be directly coupled together, there is no theoretical limit to the size and processing power that such a machine can attain. A five cabinet FLEX/32 could offer performance in the 500 megaflops range, for example, depending on use of suitable algorithms. The availability of an FPCM would turn the commercially available FLEX/32 MultiComputer into a lower cost array-processing super-computer replacement.

Phase II

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
1985
Phase II Amount
$500,000
___(NOTE: Note: no official Abstract exists of this Phase II projects. Abstract is modified by idi from relevant Phase I data. The specific Phase II work statement and objectives may differ)___ The FLEX/32 MultiComputing Environment is a general-purpose, digital multiprocessor system that allows virtually any number of high performance, heterogeneous, 32-bit Computer Modules to compute together on one or more tasks. This project addresses the feasibility of adding a new Computer Module to the FLEX/32 standard set: the Pipelined Floating Point Computer Module (FPCM). This module would operate in the four to six megaflops (million floating point operations per second) range. It would be fully integrable into any FLEX/32 configuration, be it all FPCMs or mixed as needed with already existing Computer Module types. FPCM software would execute under UNIX System V, used by other FLEX/32 modules. A FLEX/32 cabinet could contain up to twenty FPCM processors, giving single cabinet power in the 80 to 120 megaflops range. Since there is no inherent architectural limitation to the number of cabinets that can be directly coupled together, there is no theoretical limit to the size and processing power that such a machine can attain. A five cabinet FLEX/32 could offer performance in the 500 megaflops range, for example, depending on use of suitable algorithms. The availability of an FPCM would turn the commercially available FLEX/32 MultiComputer into a lower cost array-processing super-computer replacement.