SBIR-STTR Award

The objective of this proposal is to further explore PbSnSe detector array on Si substrate. Two approaches are proposed. One is a zero-risk incremental advance that employs a new growth condition to reduce the dislocation density. Another approach is a novel fabrication technique with high-risk but it could enable revolutionary rather than evolutionary advances. IV-VI semiconductors such as Pb1-xSnxSe can be grown epitaxially on Si substrate with a fluoride buffer layer. Monolithic mid-IR detector arrays have been fabricated on Si substrate with read-out integrated circuit and shown promising performance. The main advantages of IV-VI Pb-salt semiconductors include: (1) the large dielectric constant helps screen and localize the defect related effects. (2) The uniformity of the epitaxial material and thus the cutoff wavelength is high. This reduces the demand for powerful signal processing ROIC. (3) The low growth temperature allows direct growth of Pb-salt detector structure on Si with ROIC. Therefore, a cost-effective, monolithic FPA can be fabricated on Si substrate. Two-color simultaneous waveband operation and large formats of FPA can also be fabricated.

Keywords:
Mid-Ir Detector, Focal Plane Array, Si Substrate, Iv-Vi Lead Salt

The objective of this proposal is to further develop IV-VI PbSnSe detectors epitaxially grown on Si substrates. The motivation of fabricating IV-VI detector arrays on Si is based on the following advantages of IV-VI Pb-salt semiconductors. (1) The large dielectric constant helps screen and localize the defect related effects. (2) The epitaxial material on Si is highly uniform, and thus the cutoff wavelength in large area is highly uniform. This reduces the demand for powerful signal processing of a read out integrated circuit (ROIC). (3) The low growth temperature allows direct growth of Pb-salt detector structures on Si with integrated ROICs. Therefore, a cost-effective, monolithic focal plane array can be fabricated on a Si substrate. The intellectual merits lie in new growth techniques for IV-VI semiconductor grown on a Si substrate. Our first technique is to apply an annealing method to a thin template epitaxial layer. Another new growth technique is to grow in-situ p-n junction. The successful outcome of this proposal would lead to affordable detector focal plane arrays that have comparable or better performance than the current state-of-art devices.

Keywords:
Lwir Detector, Focal Plane Array, Si Substrate, Pbsnse, P-N Junction