SBIR-STTR Award

Imbedded Component / Die Technology (IC/DT) A 3-D Modular Designed CCA: The need for high reliability electronic military systems coupled with reduced size and weight factors has demanded the evolution of circuit card manufacturing technology for miniturizing and assembling printed circuit card assemblies into standard modular designed configurations. IC/DT will advance electronics manufacturing to the next generation by transforming 2-D component assemblies into 3-D modular CCA'S. IC/DT substitutes placement of components on the surface of an organic substrate onto or near a rigid, thermally conductive core utilizing multi-level cavities. The elimination of all external component level secondary packaging further increases reliability by reducing mass and the number of opportunities for electrical interconnect failure.The use of bare die and thick/thin film components reduces both overall mass /weight and CCA size. IC/DT improves form and fit factors with increased component to substarte ratio allowing for smaller CCA's or for the addition of redundant systems to increase relaibility for hi-rel applications. Flexible interconnects from component to component or component to substrate, coupled with vibration - dampening encapsulant, allow for reliable use in high vibration and / or G-Force environments. Replacing solder interconnects, as the mechanoical and electrical attachment material, with conductive adheasives /epoxies and wire bonds allows for a more efficient interconnect media. The use of IC/DT when assembling CCA's can dramatically improve reliability and also improve form and fit factors by building CCA's in a modular 3-D configuration. The following companies TPOC'S are referenced for adding their support and help to this SBIR endeavor: Lockheed Martin Len LaCroix, BAE George Burruss, and Honeywell Patricia Dare

Miniaturizing electronic packaging is critical to the advancement of electronics design and capability. Smaller, denser packages are required to increase data processing capability of current systems. The objective of the research project is to continue development of increased signal processing capability for interceptor electronics while maintaining low junction temperatures for improved performance and reliability. In Phase I, a conceptual design was proposed for miniaturizing an existing massive parallel image processor that currently utilizes four FPGA’s to allow for a 400% increase in processing elements over current planar designs within the same physical envelope. This increase in CPU’s for processing focal plane array data enhances weapon system capability and reliability. Phase II will pursue a manufacturing and assembly redesign of the parallel processing array electronics assembly using STI’s Imbedded Component/Die Technology. The proposed method of stacking bare die interposer modules, thermally coupled to an inner thermal core or lid, provides passive cooling for true miniaturization with integrated thermal management. An engineered prototype shall be delivered as a proof of principle demonstration for future testing and integration into a missile defense system.

Keywords:
Reliability, Reduced Weight, Thermal Management, Miniaturization, Smallest Form And Fit Factor, Reduced Size, Advanced Materials, Robustness