The objective of this proposed SBIR phase I work is to design, build and therefore demonstrate the feasibility of an on-chip optical interconnector. This proposed device contains a molded plastic optical connector, a fiber ribbon, an on-chip optical receptacle, VCSEL, PIN diode (arrays for multiple-channel applications), and necessary electronic circuits, all in one compact unit. The design targets high bandwidth, low-cross talk, and low mechanical profile for on-chip implementation in today¡¯s and next generation high-performance computing systems. This device is expected to open up a new avenue for data communication and link between, e.g., central processing unit (CPU) and its peripheral counterparts at a speed and bandwidth otherwise impossible with the traditional printed circuit board (PCB). The proprietary design of this optical interconnector allows easy reconfiguration and manufacturing at low cost. With its superior data-link performance, the device is expected to find critical applications in a wide range of computing and smart electronics systems. Anticipated Benefits/Commercial Applications: The proposed on-chip optical interconnector is expected to find both commercial and military applications in a wide range of computing and smart electronics systems.
Keywords: optical interconnector, data link, on-chip, VCSEL, fiber optics, computer, central processing unit, low cost
