SBIR-STTR Award

A Superior High Dielectric Constant Capacitor with Nickel Electrodes for Use in Integrated Circuits
Award last edited on: 4/3/08

Sponsored Program
SBIR
Awarding Agency
DOD : MDA
Total Award Amount
$792,390
Award Phase
2
Solicitation Topic Code
BMDO00-014
Principal Investigator
Lee Kammerdiner

Company Information

Applied Ceramics Research Company

1420 Owl Ridge Drive
Colorado Springs, CO 80919
   (719) 948-2109
   lkammer@prodigy.net
   N/A
Location: Single
Congr. District: 05
County: El Paso

Phase I

Contract Number: DASG60-00-M-0131
Start Date: 5/11/00    Completed: 11/11/00
Phase I year
2000
Phase I Amount
$64,500
High dielectric constant materials are increasingly important for pushing the state of the art in semiconductor integrated circuits. They are necessary in applications that require high capacitance values per lateral area. One example technology currently under development uses Barium Strontium Titanate BST), planned for use in DRAM's. Although the dielectric constants are considerable, one disadvantage is the need for plantinum electrodes. Another example occurs in Radio Frequency Identification Chips that require high capacitance to store charge. Frequently these use separate discrete devices which are undesirable in regard to cost and yield. The device proposed here has potentially higher dielectric constants than BST and can be used with nickel instead of platinum electrodes.Anticipated Benefits/Commercial Applications: DRAM's represent by far the largest integrated circuit market at this time. As this industry moves to the 256 Mb level high dielectric constant materials will be necessary. The device proposed here can satisfy that need. The device also provides advantages of cost and complexity in any integrated circuit application requiring high capacitance such as in RFID chips

Phase II

Contract Number: DASG60-02-C-0065
Start Date: 6/19/02    Completed: 6/18/04
Phase II year
2002
Phase II Amount
$727,890
The use of high dielectric constant materials in semiconductor integrated circuits is greatly expanded due to their obvious advantage of providing higher capacitance per unit area compared to the more conventional silicon oxide/silicon nitride capacitors. There are at least three general areas where these are needed: 1) DRAM memory cells, 2) smart card storage capacitors and 3) decoupling capacitors. In Phase I we took the general approach of developing a capacitor that was not specific to the application. In this proposal the application has been narrowed to the development of an integrated decoupling capacitor. In order to accomplish this we have received support from three semiconductor companies : Atmel, EM Microelectronics and Vitesse. They will supply us with finished wafers, which we will then use to demonstrate our technology. In the case of the first two companies these will be silicon wafers, while the third application will be on GaAs. At the end of the program we will produce a finished product with integrated decoupling capacitors