SBIR-STTR Award

Silicon-on-Sapphire Radiation Hard EEPROM Cell
Award last edited on: 6/4/04

Sponsored Program
SBIR
Awarding Agency
DOD : MDA
Total Award Amount
$785,995
Award Phase
2
Solicitation Topic Code
BMDO00-014
Principal Investigator
Ronald E Reedy

Company Information

Peregrine Semiconductor Corporation (AKA: pSemi)

9450 Carroll Park Drive
San Diego, CA 92121
   (858) 731-9400
   sales@peregrine-semi.com
   www.peregrine-semi.com
Location: Multiple
Congr. District: 52
County: San Diego

Phase I

Contract Number: DTRA01-00-P-0130
Start Date: 7/6/00    Completed: 1/6/01
Phase I year
2000
Phase I Amount
$63,344
The objective of this proposal is to demonstrate and characterize the radiation performance of a new EEPROM cell fabricated in Ultra Thin Silicon, UTSi. Peregrine Semiconductor Corp. has invented and patented a novel non-volatile memory cell. The cell has been shown to be fully functional but has not been fully characterized or tested for use in military, radiation or high temperature environments. The cell will be characterized for data retention, write cycle endurance, radiation response, write and read times and temperature response. The cell is fabricated without any additional processing or masking steps, making it appropriate for embedding in virtually any integrated circuit. The impact of this work will be far-reaching, especially military and satellite systems, for which embedded non-volatile memory in a radiation hard process has not been available. Potential applications include digital, mixed signal and RF IC's, stand-alone memory chips and field programmable gate arrays.Anticipated Benefits/Commercial Applications: The use of non-volatile memory in radiation environments has not been widespread due to issues discussed above. Once a complete characterization of the core cell is completed, a follow-on project will be proposed to demonstrate a complete 64k EEPROM block, including on-chip charge pumps, integrated sense amps and all other circuitry necessary to enable on-orbit read and write functions. That Phase II SBIR proposal will be based on the data from this Phase I and demonstrate the capability to make large (>1M) EEPROM/flash and embedded EEPROM. Once the Phase II SBIR is completed, the EEPROM will be incorporated directly into Peregrine's core product offerings for satellite customers, both commercial and military. If the cell show's promise for non radiation hard markets (such as integration with RFIC's) it will be included in those products as well.

Phase II

Contract Number: DTRA0103C0029
Start Date: 3/27/03    Completed: 3/27/05
Phase II year
2003
Phase II Amount
$722,651
This document is an application for a Phase II SBIR on the development and characterization of radiation hardened and commercial non-volatile EEPROM memory base technology for embedded applications in Mixed Signal, RFIC and digital ASICs. Peregrine Semiconductor Corporation was awarded the Phase I SBIR for the evaluation and feasibility of the underlying EEPROM cell technology, specifically - demonstration and characterization of a radiation hardened EEPROM cell. The Phase I effort successfully demonstrated that Peregrine’s Plus Cell EEPROM built on UTSi® CMOS meets all radiation hardness, reliability, endurance and retention requirements for satellite and commercial applications. It is the purpose of the Phase II effort to demonstrate that this cell can be embedded into integrated circuits and pass the same set of requirements, and to increase the number of cells tested to ensure larger blocks of these cells meet the same performance criteria. Successful completion of this Phase II effort will enable satellite and commercial companies to be able to design EEPROM into virtually any IC they require. Peregrine Semiconductor therefore applies for this second phase SBIR, to fully develop and characterize the technology, bring it to manufacturing level and enable offering such embedded capability to space and commercial applications. Anticipated Benefits/Commercial Applications: The EEPROM cell technology has tremendous value and application for both Government and industry. The core EEPROM cell is manufactured without additional processing steps or masks, making it both simple and cost-effective. It can also be integrated into mixed signal and RFIC applications thanks largely to the core cells simplicity. In the last year, while evaluating the basic cells performance, both commercial and satellite customers have identified numerous applications for the integration of non-volatile memory (EEPROM) in RFIC technology. As a first example, Peregrine has announced a commercial Phase Lock Loop (PLL) which can store its programming on-chip in embedded EEPROM. This permits frequency programming without the use of an external processor, which saves both complexity and cost in fixed frequency applications. Areas such as communications, instrumentation, medical and Government markets will benefit from this product. EEPROM in digital ICs offers shortened development times thanks to its reprogramability. It also enables lower inventory costs since a given IC can be reconfigured to meet multiple requirements. It also enables date or lot coding, on-board parameter adjustment (such as VCO tuning or crystal oscillator accuracy) and yield enhancement. The addition of EEPROM technology on RFICs is revolutionary and not available from any other IC source. Peregrine Semiconductor believes that this technology has significant value for US industry beyond its applicability to radiation hardened and space applications. Ultra Thin Silicon (UTSi) CMOS technology is uniquely suited to allowing embedded EEPROM in integrated circuits which have heretofore not been candidates for integrated EEPROM. The combination of CMOS and insulating sapphire substrate enables the simple Plus Cell (see below for description) and allows simple routing of high voltage programming signals without the normal process and design complexity of traditional

Keywords:
EEPROM, Rad-Hard , RF, Embedded Memo