SBIR-STTR Award

We are proposing the research and development of a non-destructive-read-out ferroelectric gate (NDRO) memory. In a ferroelectric gate memory, ferroelectric thin films like strontium bismuth tantalate are used as the gate dielectric. In order to prevent the inter-diffusion of the ferroelectric thin film into the silicon substrate, thin buffer layers like zirconium oxide and yttrium oxide can be used as a diffusion barrier. The thickness of the buffer layer and the ferroelectric thin film will be optimized to minimize charge injection at the silicon-insulator interface and maximize ferroelectric charge retention. The metal-ferroelectric-insulator-semiconductor structures (MFIS) will be analyzed structurally using x-ray diffraction and transmission electron microscopy. The electrical characteristics of the MFIS structures will be analyzed by capacitance-voltage (C-V), Polarization vs Electric field (P-E) and Current-voltage measurements. Ferroelectric gate field effect transistors (MFISFET) will be fabricated under optimized process conditions. The devices will be tested for memory window, memory retention and radiation hardness. Anticipated Benefits and

Potential Commercial Applications:
Ferroelectric gate FETs (MFISFET) have higher writing speed and unlimited number of read write cycles (greater than 1012) when compared to conventional floating gate electrically erasable programmable read only memories (EEPROMS), they will become the ultimate non-volatile memory technology for 21st century. This technology has multi-billion dollar potential. Because of their radiation hardness, they have extensive use in