SBIR-STTR Award

A New Reconfigurable, Compact, Fault-Tolerant, Very High-Speed, FGPA-based Image Processing Architecture
Award last edited on: 10/13/2005

Sponsored Program
SBIR
Awarding Agency
DOD : MDA
Total Award Amount
$65,000
Award Phase
1
Solicitation Topic Code
BMDO98-010
Principal Investigator
Stephen P McGrew

Company Information

New Light Industries Ltd

West 9713 Sunset Highway
Spokane, WA 99204
   (509) 456-8321
   marcyc@nli-ltd.com
   www.nli-ltd.com
Location: Single
Congr. District: 05
County: Spokane

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
1998
Phase I Amount
$65,000
The newest generation of Field-Programmable Gate Arrays (FPGAs) have up to half a million logic gates, connectable in arbitrary ways by down-loading a binary configuration file. These FPGA's, coupled to CCD arrays and trained using evolutionary techniques, offer a new and powerful approach to high speed, compact image processing systems. The proposed Phase I effort will develop a robust, reconfigurable, compact, fault-tolerant image processing and classification architecture as a new and innovative application of existing commercial off-the-shelf technology. The specific target application is a universal reader of holograms and other optically variable devices (OVDs) used internationally for anti-counterfeit/ security on currency, credit cards, passports and identifica-tion cards. In addition to substantial commercial applications in the anticounterfeit/security industry, the resulting image processing archi-tecture will have potential applications of interest to the Department of Defense in missile interceptor guidance, multiple target tracking, and autonomous vehicle guidance. The potential market for a universal OVD (optical variable device) reader; is hundreds of millions of dollars per year. New Light Industries, Ltd., will both manufacture the readers and license the technology to other manufacturers.

Keywords:
FPGA'S; Anticounterfeit; Security; Hologram; Genetic Algorithm; Evolutionary Computing; Image Proces

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
----
Phase II Amount
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