SBIR-STTR Award

Computer Architecture for Extremely Rapid Processing
Award last edited on: 9/13/2002

Sponsored Program
SBIR
Awarding Agency
DOD : MDA
Total Award Amount
$59,430
Award Phase
1
Solicitation Topic Code
BMDO96-010
Principal Investigator
Israel L Medvedev

Company Information

Nova Management Inc

659 Abrego Suite 5
Monterey, CA 93940
   (831) 373-4544
   jetope@novamanagement.com
   www.novamanagement.com
Location: Multiple
Congr. District: 19
County: Monterey

Phase I

Contract Number: DASG60-96-C-0131
Start Date: 4/5/1996    Completed: 10/5/1996
Phase I year
1996
Phase I Amount
$59,430
We propose to develop an advanced processor that will contain 4 to 64 reconfigurable DSPs/Neuro chips individually rated at 1.2-2.4 GigaFLOPS (10-20 BOPS) capable of operating in parallel and providing 5-153 GigaFLOPS performance for optical signal processing and other advanced application areas. These parallel rDSP chips possess large associated internal memories (4-16 MBytes/chips) to support the processing of large sections of individual images. Nova Management has a design approach for developing parallel systems in the range of 1.2 GigaFLOPs to several TeraFLOPs. Dr. Medvedev, Principal Investigator, has designed similar systems in Russia containing 32-640 parallel DSPs. The system we propose combines Russian design theory with US hardware. The resulting machine will be capable of performance of at least 20 GigaFLOPs with Gigabytes of RAM.

Phase II

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Start Date: 00/00/00    Completed: 00/00/00
Phase II year
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Phase II Amount
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