Silicon wafers are the single largest cost component within solar photovoltaic modules. To maintain the cost reduction targets outlined in industrial roadmaps, wafer costs need to be significantly reduced. Reducing the cost of wafers requires reducing the kerf-loss and wafer thickness while increasing throughput in tools for processing silicon ingots into wafers. The proposed technology augments the ability of wire electrical discharge machining to process silicon ingots into wafers. The capabilities of this approach will exceed the capabilities of the incumbent diamond wire saw technology by 2-5X on throughput and reduce both kerf-loss and wafer thickness by 60-70%. This will result in a silicon photovoltaic wafer cost reduction of as much as 60-70%. The Phase I work will experimentally demonstrate the fundamental science behind the proposed technology and demonstrate two key metrics of the technology, specifically wafer cutting speed and cut surface roughness. Additional work will be focused on verifying the technical requirements of the industry for the proposed technology. Any industry that utilizes semiconductor wafers would benefit from the proposed technology. Industries that would benefit include silicon integrated circuits, silicon carbide and gallium nitride power electronics, microelectromechanical sensors, light emitting diodes, compound semiconductor multi-junction solar cells for satellites, and many others.
