SBIR-STTR Award

Photonic-Storage Subsystem Input/Output (P-SSIO) Interface
Award last edited on: 10/22/2018

Sponsored Program
SBIR
Awarding Agency
DOE
Total Award Amount
$229,989
Award Phase
1
Solicitation Topic Code
05a
Principal Investigator
Kevin A Vallance

Company Information

Nanoprecision Products Inc (AKA: nPP )

411-B Coral Circle
El Segundo, CA 90245
   (310) 597-4991
   mbarnoski@nppmail.com
   www.nanoprecisionproducts.com
Location: Multiple
Congr. District: 33
County: Los Angeles

Phase I

Contract Number: DE-SC0018499
Start Date: 4/9/2018    Completed: 4/8/2019
Phase I year
2018
Phase I Amount
$229,989
The Office of Advanced Scientific Computing Research aims to develop next generation leadership class supercomputers which are used to analyze, simulate, model and predict complex phenomenon for numerous scientific and DOE mission critical applications- For affordable and scalable supercomputers, high-speed, distance independent and power efficient photonic interconnects will be a key enabling technology to achieve this goal- The objective of this SBIR effort is to develop and investigate a photonic-storage subsystem input/output (P-SSIO) interface module with a commercialization path for a reconfigurable solution between server-class controllers and multiple non-volatile memory express (NVMe) storage subsystems over peripheral component interconnect express (PCIe) 4-0 protocol- In this program, Columbia University will coordinate and lead a team of experts from five businesses including Ayar Labs, Emu Technology, Freedom Photonics, nanoPrecision Products and PLC Connections- The team will develop photonic integrated components, network architectures and subsystem I/O interface to demonstrate energy efficient P-SSIO for the next generation server-to-storage interconnection- The ultimate P-SSIO system will demonstrate a simultaneous interface between 4-8 server-controllers and 16-32 NVMe at 256GB/s aggregated I/O data rate- The P-SSIO will be developed on a silicon photonic (SiP) platform and utilize silicon interposer technology to enable a dense integration of optical transceivers, switches and laser sources to obtain a reconfigurable WDM network capable of 0-5pJ/bit energy efficiencies-

Phase II

Contract Number: ----------
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
----
Phase II Amount
----