SBIR-STTR Award

Cost-effective and power-efficient radiation tolerant semiconductors are needed in various harsh environments, such as particle detectors, communication satellites, high-altitude avionics and medical imagining equipment. These include amplifiers, voltage regulators, analog-to-digital converters (ADCs) and digital logic circuitry. However, radiation-tolerant high-speed ADCs currently cost more than $30, 000 per channel and have a high power consumption. A novel high-speed radiation tolerant ADC is proposed, leveraging TallannQuest’s patented rad-hard-by- design technology, offering significantly lower power consumption and smaller size than what is offered by the current state of the art. This will result in an order of magnitude lower cost per channel, and will allow for greater integration of multiple ADCs into a single integrated circuit (IC). Such integrated solution, which may represent an entire analog front-end for detectors used in nuclear physics experiments, as well is in other applications (e.g., satellite communications and medical imaging equipment), is an anticipated outcome from the extension of this Phase 1 research project into a Phase 2 project.

Cost-effective and power-efficient radiation tolerant semiconductors are needed in various harsh environments, such as particle detectors, communication satellites, high-altitude avionics and medical imagining equipment. These include amplifiers, voltage regulators, analog-to-digital converters (ADCs) and digital logic circuitry. However, radiation-tolerant high-speed ADCs currently cost more than $30,000 per channel and have high power consumption. A novel multi-channel, high-speed radiation tolerant ADC is proposed, leveraging Apogee Semiconductor’s patented rad-hard-by-design technology, offering significantly lower power consumption and smaller size than what is offered by the current state of the art. This will result in an order of magnitude lower cost per channel, and will allow for greater integration of multiple ADCs into a single integrated circuit (IC). During the course of the Phase I, we have conducted an extensive study, analyses, circuit design, simulations, chip fabrication and on-silicon measurements to demonstrate the feasibility of the approaches and techniques proposed in the Phase-I proposal. All the tasks outlined for Phase I have been successfully completed. During Phase II, a radiation-tolerant 16-channel, 1 Gigabit-per-second 12-bit ADC will be designed and fabricated using a state-of-the-art 28nm CMOS silicon fabrication process. The resulting silicon will be radiation-tested to ensure compliance with nuclear physics applications, thereby also validating its tolerance to the lower radiation levels experienced in aerospace and medical imaging environments. Commercial applications and other

Benefits:
The outcome of the Phase II project will be a low-cost integrated solution that will not only address the DoE needs, but will also enable large constellations of small communication satellites to provide low- latency and high-speed, cost-effective internet access to underserved populations. It will also provide a cost-effective solution for medical imaging equipment that will allow wider public access to it, as well as reduced exposure of patients to harmful x-ray radiation.