SBIR-STTR Award

Electronics for pulsed front-end devices at pulsed particle accelerators are typically accessed through up to 4 networks, which carry timing information, pulse-to-pulse sequencing, real-time streaming data, and configuration information, respectively. Although modern commercial networks offer a rich variety of features, they are not well optimized to the needs of pulsed accelerators for clocking, pulse-by-pulse control, or reliable real-time data acquisition with sub-millisecond timeouts in an electrically noisy environment. In this project, circuit switching will be used to provide preferential delivery of real-time data streams, with error correction adding noise immunity. The accelerator clock frequency will be carried by synchronizing the data link byte clock to the accelerator clock. Clock phase and fiducial timing data will be sent by custom extensions to the circuit switching protocols. Separate embedded power PC processors coupled via shared memory within a single field programmable gate array (FPGA) will be employed for real-time and non-real-time functions. Phase I will extend a previously developed approach for circuit switching both real-time and non-real-time data onto a single network physical link to carry accelerator clock and fiducial timing data. An additional technology for coupling multiple power PC processors, embedded within a single FPGA via shared memory, also will be developed. Both technologies will be combined with a dual-access PCI (Peripheral Component Interconnect) master, in an FPGA design intended for use, on a demonstration hardware platform packaged as a PCI mezzanine card.

Commercial Applications and Other Benefits as described by the awardee:
The technology should find application in computer network interface cards, network fabric switching points, and embedded device controllers for accelerator devices. The use of such techniques should lead to more reliable accelerators

Electronics for pulsed front-end devices at pulsed particle accelerators are typically accessed through up to 4 netwowrks, which carry timing information, pulse-to-pulse sequencing, real-time streaming data, and configuration information, respectively. Although modern commercial networks offer a rich variety of features, they are not well optimized to the needs of pulsed acclerators for clocking, pulse-by-pulse control, or reliable real-time data acquisition with sub-millisecond timeouts in an electrically noisy environment. In this project, circuit switching will be used to provide preferential delivery of real-time data streams, with error correction adding noise immunity. The accelerator clock frequency will be carried by synchronizing the data link byte clock to the accelerator clock. Clock phase and fiducial timing data will be sent by custom extensions to the circuit switching protocols. In Phase I, a previously-developed approach for circuit switching both real-time and non-real-time data onto a single network physical link, via additional hardware inserted between the media access and serializer-deserializer layers, was extended to carry accelerator clock and fiducial timing data. A method for coupling multipler power PC processors embedded within a single field programmable gate array via shared membory was developed. In Phase II, the hardware design will be completed and two prototype circuit boards will be constructed and debugged. A large volume of real-time operating system and application-level software will be developed. End-to-end testign will demonstrate simultaneous real-time data streaming and Internet-accessible, non real-time, data acquisition control and data analysis.

Commercial Applications and Other Benefits as described by the awardee:
The technology should find application in embedded device controllers for accelerator devices that provide large volumes of data during each pulse - data that must be processed before the next pulse is generated. The technology should lead to more reliable accelerators and significant increases in average effective luminosity. Other applications include computer network interface cards and network fabric switching points