The work outlined in this proposal is focused on developing a powerful, extensible and interactive compiler ecosystem for efficient and productive design of high-performance, precision-timed (PRET) numerical computation. With proliferation of autonomous and distributed cyber-physical systems in commercial, defense and security application areas, the need for such a tool arises due to inadequacy of traditional, throughput optimized, computing infrastructure for design of deterministic, low latency numerical computation needed in high performance control and communication systems. To achieve high performance on our PRET numerical machines we embrace, instead of abstracting away, the architecture and the compiler by mapping architectural and compiler parameters to numerical algorithm performance metrics in our interactive compiler tool. This allows reinvesting of designer's, often unproductive, code profiling time into informed decision making during interactive compilation. Focus on numerical computation is the key. By combining this technique with hardware metaprogramming we are able to successfully map many interesting numerical algorithms to variety of related processors (an architecture domain) under latency guarantees. With appropriate backends, the modularity of our compiler infrastructure allows even mapping to arbitrary architectures. In such cases ensuring latency guarantees, if at all possible, is the task of the backend tool.
