Circuit techniques and the associated process and manufacturing considerations are studied to allow the design and manufacture of low power, low cost, wireless communications transceivers using Silicon-On-Insulator (SOI) fabrication technology. Circuit techniques are developed which will allow the realization of the critical analog and digital building blocks which are required for the next generation of wireless communications systems. Specifically, the analog building blocks that will be evaluated are RF amplifiers, mixers, continuous time filters, D/A, and A/D converters. Digital blocks that will be evaluated are digital filters, direct digital frequency synthesizers, and adaptive equalizers. These circuit designs will be optimized to work in the presence of the significantly different device operating characteristics that will manifest themselves in future submicron SOI technologies. Fundamental device physics and practical processing limitations dictate that future SOI behavior, IV curves, subthreshold behavior, source-to-drain breakdown, and transconductance behavior. These basic differences in device operating behavior will make conventional circuit designs inappropriate. New designs are investigated that exploit the power dissipation and isolating characteristics of next-generation SOI techniques while compensating for the unique behavior of these devices.
