SBIR-STTR Award

The HgTe-CdTe system represents an excellent platform for infrared detection applications: its direct band gap E0 spans a 1.9 eV range from -0.3 eV (HgTe) to 1.6 eV (CdTe) and the nearly identical lattice constant between the two binary compounds makes it easy to grow intermediate random Hg1-xCdxTe alloys with continuously tunable optical properties between HgTe and CdTe. Unfortunately, however, HgTe-CdTe (MCT) suffers from very severe shortcomings, including use of high cost substrates and its difficult integration with Si-technology. Here we present a new approach to overcome some of these limitations and achieve direct integration of lattice mismatched HgTe-CdTe semiconductors with Si technologies. Our proposed program focuses on fabrication of lattice engineered virtual substrates and buffer layers based on the newly developed (Si)-Ge1-xSnx alloy system. These materials are grown on silicon substrates with exceptional crystallographic and morphological quality and possess random diamond cubic structures. This work has significant potential because the proposed templates can be fully integrated with silicon and their composition can be varied to cover a wide range of tunable lattice parameters (above that of Ge) and thermal expansions coefficients that approach those of HgCdTe

The Silicon Photonics Group at Arizona State University, Raytheon Vision Systems and NVESD propose new approaches to buffer layer architectures for integration of HgTe-CdTe (MCT) with Si. The Ge-Sn compositional range will be explored to fabricate lattice-engineered templates on various Si crystallographic orientations for the subsequent growth of CdTe at conditions compatible with Si CMOS processing. Silicon will also be incorporated into Ge-Sn to obtain Si-Ge-Sn ternaries that will provide tunable thermal matching with the II-VI compounds. The unique ability of the Si-Ge-Sn system to absorb defects and minimize strain in mismatched heteroepitaxy is likely to yield device quality materials with defect densities less than 105 cm-2. Growth, characterization and performance evaluation of HgCdTe will be conducted on CdTe/Ge1-xSnx/Si large-area (3-4”) low-cost substrates. Optimized CdTe/HgCdTe heterostructures will be used to produce and test prototype LWIR photodiodes and focal plane arrays in hybridized form. The objective is to demonstrate high performance MCT photodiodes grown on Si-Ge-Sn buffered Si that exceed base line characteristics of commercially available HgCdTe devices grown on Si(211). The uniqueness of this project lies on the development of entirely new classes of Si-based Si-Ge-Sn alloys with adjustable lattice constants and thermal expansion coefficients compatible with those of Hg-Cd-Te systems

Keywords:
HGCDTE, SILICON INTEGRATION, GESN, IR-FPA