ENGIN-IC, Inc. proposes a Phase I study to develop an innovative wafer-scale phased array antenna to support the requirement for V-band transmit, SATCOM downlinks. Given the constrains of maximum element to element spacing that is governed by fundamental laws of physics, the phased array antenna will require wafer scale packaging. By utilizing innovate chip-on-chip and chip-on-substrate technology, the ENGIN-IC team has developed an approach to achieving a highly integrated, reliable array for space applications. Key elements that will be reviewed include top level system requirements, simultaneous multi-beam architectures, packaging, and front-end component performance. Key items to be developed include GaN MMIC chipsets at V-band with high performance PAs, phase shifters, and integrated beamformers, radiating elements, and the packaging methodology to handle thermal performance in the very small element spacing. The output of the Phase I study will be an array concept that is scalable and can be used across multiple platforms.
