SBIR-STTR Award

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Novel Mitigation Techniques for Reconfigurable Computers for Space Based Applications
Award last edited on: 2/3/2010

Sponsored Program
SBIR
Awarding Agency
DOD : AF
Total Award Amount
$1,035,568
Award Phase
2
Solicitation Topic Code
AF081-094
Principal Investigator
Jason Villarreal

Company Information

Jacquard Computing Inc

1960 Chicago Avenue Suite C6
Riverside, CA 92507
   (951) 742-8939
   info@jacquardcomputing.com
   www.jacquardcomputing.com
Location: Single
Congr. District: 41
County: Riverside

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2008
Phase I Amount
$99,840
Achieving reliability from SEU through the use of well defined modular hardware components that implement computation operations as well as interfacing between FPGAs and from FPGAs to memory modules.

Keywords:
Reconfigurable Computing, Fpgas, Programmability, Composability.

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2009
Phase II Amount
$935,728
ROCCC 2.0 is a third generation C to HDL compiler tool that builds on the experience of ROCCC 1.0 and introduces modular designs. These allow the reuse of code across multiple platforms and can help achieve reliability from SEU through the use of well defined modular hardware components that implement computation operations as well as interfacing between FPGAs and from FPGAs to memory modules.

Benefits:
Improved productivity, performance and reliability of on-board space-borne reconfigurable computing systems.

Keywords:
Reconfigurable Computing, Fpgas, Programmability, Composability.