SBIR-STTR Award

Fast Matching for Sensor Data Exploitation Using FPGA
Award last edited on: 10/13/2005

Sponsored Program
SBIR
Awarding Agency
DOD : AF
Total Award Amount
$847,021
Award Phase
2
Solicitation Topic Code
AF01-101
Principal Investigator
Bahram Javidi

Company Information

BJ Information Technologies LLC

PO Box 553
Storrs, CT 06268
   (860) 450-1777
   N/A
   N/A
Location: Single
Congr. District: 02
County: Tolland

Phase I

Contract Number: ----------
Start Date: ----    Completed: ----
Phase I year
2001
Phase I Amount
$97,134
This proposal addresses the need to improve automatic change detection and pattern recognition in surveillance/reconnaissance systems. In those applications, large amounts of data are generated and must be stored and processed for each scene, which makes real-time decision making a growing challenge. In the proposed Phase I project, we will study target matching algorithms which reduce the processing time. Another problem, which would be encountered in an operational imaging system, is the issue of signal processing hardware. The algorithms, to be studied in the proposed project, are insensitive to scale and rotation of the target in the image. The methods used in these algorithms are based on wavelet theory and genetic search paradigms. The hardware is a compact FPGA design with externally linked memory. In the Phase II project, we will fabricate a breadboard imaging system using the algorithms and the hardware design developed and evaluated in Phase I.FPGA based integrated sensor and signal processing for high-speed detection and identification of targets

Phase II

Contract Number: ----------
Start Date: ----    Completed: ----
Phase II year
2002
Phase II Amount
$749,887
This proposal addresses the need to improve automatic change detection and pattern recognition in surveillance/reconnaissance systems. In those applications, large amounts of data are generated and must be stored and processed for each scene, making real-time decision making a challenge. In the Phase II project, we will evaluate and select adaptive target segmentation and matching algorithms studied in Phase I which reduce the processing time. The algorithms to be evaluated are adaptive, robust to scale and rotation of the target in the image, environmental degradation of the input scene, target placed in clutter, and sensor noise. The methods used are based on wavelet theory and genetic search paradigms. Another problem encountered in an operational imaging system is the issue of signal processing hardware. The hardware is a compact FPGA design placed on a Peripheral Component Interconnect (PCI) Mezzanine Card with externally linked memory. In the Phase II project, we will implement the algorithms on FPGA hardware and evaluate system performance. In this effort, BJ Information Technologies will partner with Lockheed Martin to provide significant improvements to existing USAF image-based target detection and tracking systems. At project end, a demonstration system consisting of algorithms and hardware will be provided to USAF.

Benefits:
FPGA-based integrated sensor and signal processing for high-speed detection and identification of targets