Terabit Technology proposes to research and develop the high speed electronics technology required to prototype and produce a 25 Gbit/s bit error rate tester (BERT). Critical elements to be developed include the random word generator, multiplexer, amplifier, receiver, clock amplifier and recovery circuit, decision flip flop, demux and error counter. Packaging technology for 40 Gbit/s circuit will also be developed. After producing a prototype, we propose to further establish the commercial viability of this technology, and proceed to a rate of 40 Gbit/s.
Keywords: FIBER OPTICS HIGH SPEED TIME DIVISION MULTIPLEXING TELECOMMUNICATIONS BERT HBT
