SBIR-STTR Award

The proposed technique, Direct RF Generation, has been validated in architectures providing extremely efficient implementation of high performance synthesizers, with very fast turning speeds, high frequency accuracies, low phase noise and pulse-to-pulse coherence. The proposed system will be competitive with the best laboratory equipment, even that most recently available. To meet other, less stringent Air Force requirements, the direct RF generation architecture could be tailored to provide a broad range of tuning bandwidths, settling times, frequency accuracies and spectral purities. By using direct microwave RF generation controlled by a fast, very broadband Phase-Lock Loop (PLL), the system avoids the hardware intensive filtering techniques necessary in traditional upconversion and multiplication schemes and will employ readily available commercial hardware, providing extremely attractive size and cost efficiencies. The proposed system also avoids the phase noise problems of DDS's. The proposed Phase I SBIR program will present the results of laboratory breadboard experimentation; will provide a specific high performance, affordable design for Phase II development and demonstration, with performance, size and production cost estimates; and will offer a proposed Phase II SBIR hardware development and demonstration program plan.

Keywords:
FREQUENCY REFERENCE FREQUENCY SYNTHESIZER DIRECT RF MICROWAVE GENERATION

Phase I of this program has validated the use of Direct RF Generation as a technique for efficient and a very cost competitive implementation of a high performance synthesizer meeting all SBIR requirements. The proposed design will be competitive with the best laboratory equipment and will be modularly reconfigurable for less stringent Air Force requirements including those which require other bandwidths, tuning speeds, accuracies and spectral purity. The system is based on the use of very broadband Phase-Locked Loops (PLLS) and direct RF generation to ensure signal purity and avoid intensive up/down conversions and filtering. It efficiently employs readily available commercial hardware in order to optimize cost and size. It also contains a number of monitoring, self-test and calibration features to guarantee compliance with performance requirements. Fast switching and high resolution are provided without the spurious problems associated with DDS devices. The Phase II program will develop a brassboard model of the proposed design in order to demonstrate all features and performance requirements of the Air Force specification. Specific customer requirements, their corresponding hardware configurations and detailed production costs will be generated during the program in order to define requirements for Phase III.