SBIR-STTR Award

HYPRES proposes to develop Multigigahertz Digital Interface between high-frequency low-power superconductor electronics such as receivers and transceivers and high-power low-frequency room-temperature electronics. It will be used in the new architecture of deserialized Digital-RF Receivers combining an extremely sensitive, ultra-linear quantizer, sampled by a low-jitter, ultra-fast clock with high-speed digital interface and low-cost room temperature electronics

HYPRES is developing Digital RF receivers and transceivers for direct conversion of wideband RF signals followed by all subsequent processing in the digital domain. The enabling component of this digital-RF technology is a high dynamic range wideband ADC modulator, implemented with low-power ultrafast superconductor electronics. Next generation of X-band and Ka-band MILSATCOM receivers can be built using the proposed architecture, which combines superconductor ADC modulators with room temperature polyphase decimation filters through high-speed digital interface. This architecture allows us to avoid yield limitations of complex superconductor digital circuits, and take full advantage of extremely sensitive, ultra-linear superconductor quantizers, sampled by a low-jitter, ultra-fast clock at rates up to 40 GHz. Much more complex digital processing resources are available at room temperature, but operate at significantly lower speed. To bridge the gap in speed and signal levels, we need fast superconductor deserializer and output drivers respectively. In Phase II we propose implement a hybrid technology digital receiver, using simple superconductor ADC front end chips, custom data links, and commercial Xilinx FPGAs

Keywords:
TRANSCEIVER, RSFQ, SUPERCONDUCTOR, DIGITAL-RF, MILSATCOM, POLYPHASE FILTER