SBIR-STTR Award

Actively Controlled Chemical Mechanical Polishing Process
Award last edited on: 11/25/02

Sponsored Program
SBIR
Awarding Agency
NSF
Total Award Amount
$493,684
Award Phase
2
Solicitation Topic Code
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Principal Investigator
Wallace Tang

Company Information

Endpoint Technologies Inc

25 Buckley Road
San Luis Obispo, CA 93401
   (805) 782-5453
   endpointec@aol.com
   N/A
Location: Single
Congr. District: 24
County: San Luis Obispo

Phase I

Contract Number: 9561184
Start Date: 00/00/00    Completed: 00/00/00
Phase I year
1995
Phase I Amount
$73,684
This Small Business Innovation Research (SBIR) Phase I project will investigate the use of in-situ, real-time film thickness monitoring and in-situ, real-time uniformity manipulation to improve process uniformity of Chemical Mechanical Polishing (CMP). Improved process uniformity will enhance the yield and effectiveness of the CMP process, which is increasingly used as a semiconductor planarization process. Phase I will develop a five-channel, real-time CMP active uniformity control system capable of compensating for center uniformity defects. Individual components will include: opto-electronics, software, five-channel optic access, and a back pressure system. Commercial application of the technology will focus on the CMP process used in semiconductor manufacturing. In addition, other potential applications include micromachining and optical circuit and fine optics production.

Phase II

Contract Number: 9704031
Start Date: 00/00/00    Completed: 00/00/00
Phase II year
1997
Phase II Amount
$420,000
This Small Business Innovation Research Phase II project aims to improve the process uniformity of the chemical mechanical polishing (CMP) planarization process. The proposed work centers on real-time process optimizations based on real-time in-situ thickness mapping during CMP planarization. The ability to improve the process uniformity is crucial to semiconductor manufacturers. CMP is a key semiconductor planarization process, and is utilized to address microlithography depth of focus problems and multilevel metallization problems. The CMP process is presently utilized by most state-of-the-art semiconductor production lines for interlevel dielectric (ILD) and shallow trench isolation (STI) planarization. The ability to improve CMP process uniformity will directly benefit semiconductor production yields