The software-based verification techniques proposed here improve on the state of the art by providing an inexpensive means of screening device integrity at any point from manufacture through use.This capability allows for protection against the load of sensitive IP onto untrusted devices without a requirement to maintain individual FPGA keys and part-specific boot material.Our approach is two-phase, with the run-time result of device verification linked to the bitstream load that puts end-user IP on the device.Anti-Tamper,Trust,assurance,Cyber-Physical Systems Security,hardware Trojans,exploitation,FPGA
