Company Profile

Binachip Inc
Profile last edited on: 2/27/2024      CAGE: 3HAQ6      UEI: D5BCJPF3Z2Z9

Business Identifier: Electronic system level (ESL) design
Year Founded
2003
First Award
2005
Latest Award
2010
Program Status
Inactive
Popularity Index
Is this YOUR Company?
Ensure accuracy and completeness of YOUR Company Profile by completing the brief Survey Instrument attached
Do you know about this Awardees?
Let us encourage you to provide any data which would enhance the completeness of this firm's profile.

Location Information

200 South Wacker Driver 15th Floor
Chicago, IL 60606
   (312) 924-1057
   N/A
   www.binachip.com
Location: Multiple
Congr. District: 07
County: Cook

Public Profile

Binachip, Inc., an electronic system level (ESL) design company that develops and markets software products, design services, and custom intellectual property solutions for high-performance applications. It offers ESLerate, a synthesis solution that provides a path for translating binary code for general-purpose embedded processors into RTL hardware accelerators for system-on-chip FPGA architectures; and solutions for migration of software onto system-on-chip FPGA platforms. The company also provides design consulting, services, technology consulting, education and training, and technical support services for embedded systems developers. It serves ESL, transportation, networking, control systems, biomedical computing, financial computing, and audio/video processing industries; and government in the United States and internationally. Binachip, Inc. was founded in 2004 and is based in Chicago, Illinois.

Extent of SBIR involvement

User Avatar

Synopsis: Awardee Business Condition

Employee Range
1-4
Revenue Range
Less than .5M
VC funded?
Yes
Public/Private
Privately Held
Stock Info
----
IP Holdings
N/A

Awards Distribution by Agency

Most Recent SBIR Projects

Year Phase Agency Total Amount
2010 1 Army $69,993
Project Title: FPGA Low Power Design Rules
2009 2 DARPA $848,140
Project Title: A High Level Synthesis Tool for FPGA Design from Software Binaries
2007 2 NASA $669,300
Project Title: A Hardware/Software Design Environment for Reconfigurable Communication Systems
2006 1 NSF $100,000
Project Title: Automated Design Environment for Embedded Systems
2005 1 NASA $100,000
Project Title: A System Level Tool for Translating Software to Reconfigurable Hardware

Key People / Management

  Prith Banerjee -- CEO

  David Zaretsky -- co-founder

Company News

There are no news available.