CRIPTC executes encrypted code and data without decryption. At the end of Phase I it was operational and leakage measurements were unable to detect data-dependent leakage from the AES S-Box component. More importantly, CRIPTC changes its encryption each compute cycle, eliminating the static bus model required for differential power or electromagnetic analysis. The architecture is flexible and can be optimized for the algorithm or resource and physical requirements. Using trade studies that consider generic program performance, tamper-resistance and stealth/physical footprint constraints, Accord will create a version of CRIPTC that specifically executes AES for loading FPGA bit-streams, protecting them from side-channel attacks. Lockheed Martin will subject the resulting tamper-resistant FPGA bit stream loading system for test and evaluation. By porting to a program tactical FPGA the technology can reach TRL 7 at project completion. Accord will evolve the design to provide anti-tamper solutions to MDA programs that, with only minor modifications, can specifically meet new FPGA and ASIC designs and for insertion into legacy FPGA boards for program anti-tamper upgrades.
Keywords: Differential Power Analysis, Tamper-Resistance, Fpga Bit-Stream, Aes, Algorithm Signal Leakage, Computer Architecture, Trusted Computer, Reduced Instruction Set Computer, Exec